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Computer-Aided Design & VLSI

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ECE faculty design chips for efficient and accessible AI

Faculty specializing in architecture, hardware, and software innovation accelerate machine learning across a range of applications.

Hun-Seok Kim appointed as inaugural Samuel H. Fuller Early Career Professor of Electrical and Computer Engineering

Prof. Kim is a world leader in efficient algorithm and VLSI design for wireless communication, signal processing, computer vision, and machine learning.

ADA Center holds 2020 symposium with virtual attendance, highlighting new research into computer design

The symposium highlighted new developments in computer architecture, and included a session on how the center's research can contribute to limiting the impact of pandemics.

Michigan chips will be first to test next-generation hardware design tools

U-M team will serve as model for nimble and innovative system-on-chip design.

Enabling anyone to design hardware with a new open-source tool

Six-month hardware design process will be turned into 24-hour automated task.

Valeria Bertacco elected IEEE Fellow for contributions to computer-aided verification and reliable system design

Prof. Bertacco is a highly noted researcher in the area of computer architecture and is Director of the department’s Computer Engineering (CE) Lab.

Injectable computers can broadcast from inside the body

This platform has enabled a variety of sensors that can fit inside the human body, made possible by several breakthroughs in ultra-low power computing.

Injectable computers

With a radio specifically designed to communicate through tissue, researchers from the Electrical and Computer Engineering are adding another level to a computer platform small enough to fit inside a medical grade syringe.

Lynn Conway Receives 2015 IEEE/RSE James Clerk Maxwell Medal

The James Clerk Maxwell Medal is one of the highest awards presented by IEEE.

Prof. Igor Markov's book on VLSI Physical Design Translated into Chinese

The book introduces and evaluates algorithms used during physical design to produce a geometric chip layout from an abstract circuit design, and presents the essential and fundamental algorithms used within each physical design stage.

Meeting the challenges for low-power System-on-Chip (SoC) Design

As designs become more complex and functional, power consumption is becoming the major design consideration and bottleneck in many portable applications.