Soft Errors: Interactions with Power Optimization

Soft errors are radiation induced ionization events that cause errors in circuits. Reliability issues due to soft errors are gaining increased prominence in nanometer technologies as the reduced nodal capacitances and supply voltages coupled with integration of multiple cores on a single chip are increasing chip soft error rates (SER). A hierarchical soft error analysis toolset, SEAT, is being developed at Penn State to help combat the soft error problem and evaluate the influence of different system design decisions on reliability. After introducing this toolset, the talk will highlight the interactions between SER and power consumption. First, we will show how some commonly used power optimizations impact SER. Next, we will discuss the influence of additional power consumed by techniques designed to combat soft error problems and demonstrate the use of adaptive techniques to strike a balance between desired SER and power budget.
Vijaykrishnan Narayanan is an associate professor of Computer Science and Engineering at Pennsylvania State University. His research interests are in the areas of energy-aware reliable systems, embedded Java, nano/VLSI systems and computer architecture. His current research projects are supported by National Science Foundation, DARPA/MARCO GSRC, Semiconductor Research Consortium, DoE and Pittsburgh Digital Greenhouse. Dr. Narayanan has received several awards including the IEEE CAS VLSI Transactions Best Paper Award in 2002, the ACM SIGDA outstanding new faculty award in 2000, Upsilon Pi Epsilon award for academic excellence in 1997, and the IEEE Computer Society Richard E. Merwin Scholarship in 1996.