Power-Efficient Accelerators for High-Performance Applications

Computers, regardless of their function, are always better if they can
operate more quickly. The addition of computation resources allows for
improved response times, greater functionality and more flexibility.
The drawback with improving a computer's performance, however, is that
it often comes at the cost of power and energy consumption. For many
platforms, this is not an issue — desktop computers, for instance,
have been consuming an increasing amount of power yet because they
comprise a small fraction of a household's overall power consumption,
this increase is tolerated.

Power increases are not tolerated, however, in modern smart-phones.
These devices do more and more each generation — sending emails more
quickly, taking better photographs, playing higher definition videos
— but must still run cool enough to be held in one's hand and must
hold charge for at least a day. Similarly, in medical imaging, newer
algorithms can provide more accurate information but require increased
compute ability but their functionality is required in a growing
number of locations away from wall-power.

This thesis explores various applications from these and other domains
that require ever-increasing compute ability but do not have access to
a proportionately increasing amount of power. Applications are
analyzed in detail to ascertain the most appropriate hardware
substrate for their execution, the efficacy of existing architectures
and their specific inadequacies are analyzed, and new architectures
and architectural features are proposed as alternatives.