On-Chip Antennas in Silicon Integrated Circuits and Their Applications
Professor Kenneth K. O,
Silicon Microwave Integrated Circuits and System Research Group (SiMICS),
Department of Electrical and Computer Engineering,
University of Florida, Gainesville, FL, 32611
ABSTRACT: The feasibility of integrating antennas and required circuits to form on-chip wireless interconnects in foundry digital CMOS technologies has been demonstrated. The key challenges including the effects of metal structures associated with integrated circuits, heat removal, packaging, and interaction between transmitted and received signals and nearby circuits appear to be manageable. Because of the area overhead associated with the antennas and required circuits, currently, these interconnects are better suited for addressing the global interconnection problem, which incidentally has been identified as a grand challenge facing the semiconductor industry. The interconnects have been used to demonstrate the feasibility of intra-chip wireless clock distribution, as well as that using an external antenna. These clock systems bypass the dispersion problem of conventional clock distribution, which has been suggested as the factor that could ultimately limit the maximum clock frequency and chip size. The skew performance for wireless approaches is expected to be superior. In fact, the clock distribution using an external antenna can synchronize an area at 3GHz that is ~4x larger than that genally accepted as possible. The jitter measurements indicate that this technology can also be competitive to the others being investigated. Besides on-chip interconnection, this technology can potentially be applied for implementation of a true single-chip radio, inter-chip communication systems, RFID tags, and others.
BIO: Kenneth O received his SB, SM, and PhD degrees in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology, Cambridge, MA in 1984, 1984, and 1989, respectively. From 1989 to 1994, Dr. O worked at Analog Devices, Inc. developing sub-micron CMOS processes for mixed signal applications and high speed bipolar and BiCMOS processes for RF and mixed signal applications. He is currently a professor at the University of Florida, Gainesville. His research group is developing circuits and components required to implement analog and digital systems operating between 1 and THz using silicon IC technologies. He was the general chair of the 2001 IEEE Bipolar/BiCMOS Circuits and Technology Meeting. Dr. O has also served as the publication chairman of the 1999 International Electron Device Meeting. He has authored and co- authored ~130 journal and conference publications, as well as held seven patents. Dr. O has received the 1995, 1997, and 2000 IBM Faculty Development Awards, 1996 NSF Early Career Development Award, and the 2004 UF PhD Advisor Award. He is also a UF Research Foundation Professor.