Nanoelectronics for Brain Inspired Computing and Implantable Neurodevices

The efficiency of today’s information processors has been dominated by complementary metal-oxide-semiconductor (CMOS) transistor scaling based on Moore’s law. However, in the nano era CMOS scaling started to face significant barriers in achieving historical performance gains. In the first part of the talk, advances in high performance Ge CMOS technology, addressing end-of-the-roadmap CMOS scaling, will be presented. I will discuss our work on Ge interface engineering and a novel dopant activation technique to improve Ge CMOS performance.
Besides the scaling limits, the conventional computing paradigm based on binary logic and Von Neumann architecture becomes increasingly inefficient as the complexity of computation increases. Brain-inspired architectures and reconfigurable-adaptive systems are emerging research fields aiming to go beyond capabilities of digital logic and eventually to reach brain-level efficiency. In order to achieve the compactness, energy efficiency, massive parallelism and robustness of biological brain in our computational systems, the most important building block will be a compact nanoelectronic device emulating the functions and plasticity of biological synapses. In the second part of the talk, I’ll introduce a new nanoscale electronic synapse based on technologically mature phase change materials employed in optical data storage and nonvolatile memory applications. Continuous resistance transition in phase change materials is utilized to mimic the analog nature of biological synapses, enabling the implementation of synaptic learning rule. Different forms of synaptic plasticity using same nanoscale synapse with picojoule level energy consumption are demonstrated.
In the future, electronics will be increasingly employed for life science and healthcare applications. In the third part of my talk I’ll explain recent advances in implantable neurodevices. I’ll discuss our efforts on improving durability of implantable brain electrodes and nanoelectronic synapse platform for interaction with biological neurons.

Bio: Duygu Kuzum received her B. S. in Electrical Engineering from Bilkent University, Turkiye, in 2004 and Ph.D. in Electrical Engineering from Stanford University in 2009. Her Ph.D. research focused on design, fabrication and characterization of Ge MOSFETs for future technology nodes. She is currently working on novel memory and storage devices and nanoscale electronic devices for brain-inspired computing as a postdoctoral researcher at Stanford University. She is the author or coauthor of over 30 journal and conference papers. She worked as a research intern at Translucent Inc. (2006) and Intel Component Research (2008). She was a recipient of a number of awards, including Texas Instruments Fellowship and Intel Foundation Fellowship.