Iron Laws for Multi-Core Scalability
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The current multi-core trend is the new rage in the industry. All major microprocessor companies have introduced or will soon introduce products containing multiple cores on a single die. It seems that scaling the number of cores has replaced the scaling of clock frequency as the primary design objective for architects. How far can we go in scaling the number of cores in the coming decade? What are the foundational principles, or "iron laws," that actually govern the scaling of multi-core machines? What are the fundamental forces that might conspire against multi-core scalability? This talk will attempt to formulate a clean framework to reason clearly about multi-core scalability issues. Iron laws on multi-core scalability with respect to architecture, algorithm, and power scaling, will be presented and illustrated with experimental data from MRL's research projects. Speculation on future multi-core designs and promising research directions will also be divulged.
John P. Shen is the director of the Microarchitecture Research Lab (MRL) at Intel. Prior to joining Intel in 2000 he spent quite a few years as a Professor in the ECE Department of Carnegie Mellon University. He supervised a total of 17 PhD students during his years at CMU, and published over 100 papers. He recently published the book "modern Processor Design: Fundamentals of Superscalar Processors" with McGraw-Hill. He is a Fellow of the IEEE and has received multiple teaching awards while at CMU. He grew up in Michigan and spent his undergraduate years at the University of Michigan (and is quite heart-broken about Michigan Football this season). Currently he is enjoying his new job in the "real world."