Impact of CMOS Scaling on RF/Mixed-Signal Circuit Designs

Professor Mau-Chung Frank Chang,
High Speed Electronics Laboratory,
Electrical Engineering Department,
University of California, Los Angeles, CA 90095-1594,
Email: [email protected]

ABSTRACT:
Recent performance advancement in super-scaled CMOS has opened a new avenue for the implementation of RF/MMICs and high-speed data converters on low cost and large wafer size silicon substrate. This talk addresses critical issues involved in designing those high performance and mixed-signal integrated circuits under various constraints of super-scaled CMOS in supply voltage, threshold mismatch, gate leakage, substrate loss, low-Q passives and effective gain degradation. The talk will also discuss potential circuit level solutions in both topology and signaling, that might mitigate those constraints and deliver the required performance and functions in future mixed-signal systems.

BIO:
Dr. Frank Chang received his Ph.D. in Electrical Engineering from the National Chiao-Tung University, Taiwan, ROC in 1979. He is now a Professor at the UCLA Electrical Engineering Department. Before joining UCLA, he was the Assistant Director of the High-Speed Electronics Laboratory at the Rockwell Science Center (1983-1997), Thousand Oaks, California. In this tenure, he successfully developed and transferred the GaAs HBT technology form RSC to the production division (now Conexant Systems and Skyworks). The HBT production has now grown into multi-billion dollars business worldwide. Dr. Chang’s research work has been mostly in the development of high-speed semiconductor devices and integrated circuits for mixed-signal system applications. He led the development of DARPA’s ADC and DAC projects for direct conversion transceiver (DCT) and digital radar receivers (DRR) systems. He invented the re-configurable RF/wireless interconnects based on FDMA/CDMA algorithms for inter- and intra-ULSI communication bus and links. He led the first demonstration of dual mode (CDMA/AMPS) RF power amplifiers based on the Si/SiGe HBTs; the first K-band (24-27GHz) RFIC in CMOS and the first single-channel CMOS ADC with 1GHz instantaneous bandwidth. He has authored or co-authored over 200 technical papers and 10 book chapters, edited 1 book and held 18 U.S. patents. He was honored with the IEEE David Sarnoff Award in 2006; Rockwell’s Leonardo Da Vinci Award in 1992. He was named an IEEE Fellow in 1996 for his pioneering work in developing ultrahigh-speed HBT integrated circuits.