Gap Fill Technology for Semiconductor Device Fabrication

Michael Barnes, PhD
Novellus Systems
ABSTRACT:
As critical device dimensions become sub-100nm, gap fill technology becomes ever more challenging as feature aspect ratios become greater than 5:1 (height to width). Current High Density Plasma (HDP) technology must be augmented with new gap fill techniques to meet these more stringent requirements. Atomic Layer Deposition (ALD) has excellent conformal gap fill capabilities but the deposition rate is too slow for practical applications. Fortunately, nano-laminate oxide films have the conformal, surface growth features of ALD but are produced with deposition rates that are hundreds of time faster. The HDP gap fill technology and its limitations will be reviewed followed by recent developments in nano-laminate oxide gap fill techniques.

BIO:
Dr. Michael S. Barnes received his Ph.D. in Electrical Engineering from the University of Michigan in 1987. After five years of semiconductor plasma process R&D at IBM's East Fishkill facility, Dr. Barnes lead product development and engineering activities for the Semiconductor Capital Equipment Companies, Lam Research and Applied Materials. After a brief period at a leading nanotechnology company, Nanosys, Dr. Barnes joined Novellus Systems where he is currently employed as Vice President and General Manager of their High Density Plasma (gap fill) Business Unit.