Evolutionary Design for Electronic Design Automation

Evolutionary design, i.e., the use of evolutionary algorithms for the automated creation of programs, electronics circuits, antennas, robots, and other objects, has become a fruitful approach in computer science and engineering in the last two decades. This talk surveys the key ingredients of evolutionary design methods and presents several techniques for improving the scalability of this approach. Examples of evolved solutions (such as approximate arithmetic circuits, CNN architectures, and image filters) that show unique properties compared to conventional designs will be presented and discussed.

Bio: Prof. Ing. Lukas Sekanina, Ph.D. received all his degrees from the Brno
University of Technology, Czech Republic (Ing. in 1999, Ph.D. in 2002),
where he is currently a full professor and Head of the Department of
Computer Systems. His research is focused on genetic programming,
approximate computing, neural networks and automated design methods. He
was awarded the Fulbright scholarship and worked on the evolutionary
circuit design with NASA Jet Propulsion Laboratory at Caltech in 2004.
He was a visiting lecturer with Pennsylvania State University (2001),
Universidad Politécnica de Madrid (2012), and a visiting researcher with
the University of Oslo in 2001. He has worked as an associate editor of
IEEE Transactions on Evolutionary Computation and an editorial board
member of the Genetic Programming and Evolvable Machines Journal. Prof.
Sekanina served as General Chair of DDECS 2013, Program Co-Chair of
DDECS 2021, EuroGP 2018 – 2019, DTIS 2016, ICES 2008, Topic chair of
DATE 2020 – 2022, and D-Track chair of DATE 2023 – 2025. He was a
principal investigator of eight Czech Science Foundation projects
projects and served as Head of the Research programme 8 of the National
Supercomputing Center IT4Innovations (2011 – 2020). He was awarded the
Czech Science Foundation President Award in 2017. He co-authored one
patent and over 250 research papers. He is a Senior Member of IEEE.

Learn more about Professor Lukas Sekanina at https://www.fit.vut.cz/person/sekanina/contact/.en#nav