Dissertation Defense

Digital Circuit Design Techniques for Low-Leakage SOI CMOS Technologies

Name: Digital Circuit Design Techniques for Low-Leakage SOI CMOS Technologies
Start: 2004-10-20T16:00:00-04:00
End: 2004-10-20T16:00:00-04:00

Rahul M. Rao

WHEN:

Wednesday, October 20, 2004 @ 4:00 pm
Add to Google Calendar

Events

Dissertation Defense

Digital Circuit Design Techniques for Low-Leakage SOI CMOS Technologies

Sponsored by