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Computer Engineering Seminar

Designing NICs in CMT Environment

Michael Wong

Solaris Core Networking Technologies

Sun MicroSystems Inc.

Niagara is Sun Microsystems' first generation chip multi-threading (CMT) processor. It differs from other contemporary design by exploiting mainly thread level parallelism (TLP) as opposed to instruction level parallelism (ILP). This approach increases application performance by improving throughput, the total amount of work done across multiple threads of execution. Designing a network interface controller (NIC) for the CMT environment would involve a different set of tradeoffs. In this talk, we present an overview of Niagara processor and discuss the design criteria for a NIC that matches the CMT environment.
Michael Wong is a senior staff engineer at Sun Microsystems. Prior to joining Sun, he held R&D positions at AT&T/Lucent Bell Labs., Cabletron, Cisco, and other startups. He received his PhD, MS and BS degrees from U. C. Berkeley.

Sponsored by

Sun MicroSystems