Bandwidth Extension Techniques in CMOS for Wireline/Wireless Communications

Professor David J. Allstot,
Dept. of Electrical Engineering,
Univ. of Washington,
Seattle, WA 98195,
[email protected]

ABSTRACT: Circuit design for digital links and optical transceivers involves three critical challenges: wide bandwidth (BW), high gain and low power. Conventional approaches trade off wide BW for low gain because the gain-BW product increases as gain decreases; multiple-stage cascades trade off high gain for power, area and BW shrinkage. Peaking techniques for single-stage amplifiers achieve high gain simultaneously with high BW extension ratios (BWER), which means fewer stages. Increases in BWER and gain are achieved using capacitor-splitting and magnetic-coupling to sequence charging currents in bridged-shunt series and asymmetric T-coil amplifiers. UWB communication systems use a 3.1-10.6GHz spectrum. LNA design is critical in a UWB receiver; it should exhibit low return loss, low noise figure, high gain across 7.5GHz, and consume minimum power and die area. Cost and SoC considerations dictate the use of CMOS. Previous designs use common-source or distributed amplifiers; good performance is achieved, but reductions in power and die area are desired. A common-gate UWB LNA is described with low power and an area efficient impedance match along with stagger-compensated series peaking for BW extension.
BIO: David J. Allstot received the B.S. from Univ. of Portland, 1969, M.S. from Oregon State Univ., 1974, and Ph.D. from Univ. of California, Berkeley, 1979. He is the Boeing-Egtvedt Chair Professor of Engineering at the Univ. of Washington and Chair of the Dept. of Electrical Engineering. Dr. Allstot has advised 80 M.S. and Ph.D. graduates and published 250 papers. Awards include: IEEE Baker Award, 1978; IEEE Circuits and Systems Society Darlington Award, 1995; IEEE Intl. Solid-State Circuits Conference B. Winner Award, 1998; Technical Achievement Award, IEEE Circuits and Systems Society, 2004; Aristotle Award, Semiconductor Research Corp., 2005. His service includes: Associate Editor, IEEE Trans. on Circuits and Systems, 1990-1993, and Editor, 1993-1995; Board of Governors, IEEE Circuits and Systems Society, 1992-1995; Technical Program Committee, IEEE Intl. Solid-State Circuits Conference, 1994-2004; Executive Committee Short Course Chair, IEEE Intl. Solid-State Circuits Conference, 1996-2000; Distinguished Lecturer, IEEE Circuits and Systems Society, 2000-2001; Co-General Chair, IEEE Intl. Symposium on Circuits and Systems, 2002. He is an IEEE Fellow.