A Sub-200mV 6T SRAM in 130nm CMOS

Bo Zhai, Graduate Student, University of Michigan
In this paper, we present the first deep sub-threshold 6-T SRAM which functions from 1.2V to 193mV, fabricated in an industrial 0.13?m CMOS technology. It provides 1.6x energy efficiency improvement over the previously proposed mux-based, sub-threshold SRAM designs while using only half the area. Adjustable footer and headers are introduced, as well as body bias techniques to allow low-voltage operation.
Bo Zhai received his B.S. degree in microelectronics from Peking University, China, in 2002, his M.S. in Electrical Engineering from the University of Michigan, in 2004. He is currently a Ph.D. candidate in Electrical Engineering at the University of Michigan. He is a research assistant in the Advanced Computer Architecture Lab at University of Michigan working with Prof. David Blaauw. His research focuses on low-power VLSI design.